Welcome to IPro Silicon IP Ltd.

About IPro:

IPro licenses Silicon IP to the Israeli Chip Design Community, from selected IP companies world-wide. We deliver key functionality for your design through best-in-class IP partnerships and first-class support. 

We act as one company. Operating at the same high standards of support and commitment that you have learned to trust along years of partnership, the IPro Group continues a long tradition of engaged support and information exchange. We inform you, learn your needs, and provide IP solutions for your SoC design challenges, enabling you to reach the market with world-class IP products - fast!

Imagine a vibrant community of Israeli fabless companies and Worldwide IP vendors, collaborating closely and sharing information. Imagine an atmosphere of trust and cooperation and mutual commitment - for the success of your designs and for the constant improvement of our IP offer. This is the IPro vision - a one-stop shop of state-of-the-art IP with unique engagement and bond with our Partners. 

About our IP Vendor Partners (click on logo to go to vendor's web):

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Differentiate Using OpenFive's Customizable SoC IP

OpenFive is a solution-centric silicon company that is uniquely positioned to design processor agnostic SoC architectures. With low-latency, high-throughput, customizable and differentiated IP for Artificial Intelligence, Edge Computing, HPC, and Networking solutions, OpenFive develops domain-specific SoC architectures based on high-performance, highly-efficient, cost-optimized IP to deliver scalable, optimized, differentiated silicon. OpenFive also offers end-to-end expertise in Architecture, Design Implementation, Software, Silicon Validation and Manufacturing to deliver high-quality silicon.

HBM2/2E IP SubSystem

HBM2/2E IP subsystem - Integrated HBM controller and HBM PHY subsystem solution supporting HBM2 and HBM2E JEDEC spec for a wide range of technology and foundry nodes. As an early advocate of 2.5D and 3D ASIC design technologies and by leveraging its experience from the industry’s first multiple successful 2.5D SoC SiP demonstration, OpenFive plays a key role in enabling industry applications that leverage the HBM 3D-stacked DRAM technology. Read more HERE.

Die to Die Controller IP Subsystem

Die-to-Die (D2D) Controller IP is targeted for heterogenous chiplet solutions in wired communications, AI and HPC applications. With recent advances in package technologies it is possible to route high speed signals within a package connecting multiple die either on Interposer or on Organic Substrate. Die-to-Die Controller IP offers unique value proposition in terms of low power, high throughput and low latency links enabling faster time to integration. Read more HERE.

Ethernet IP SubSystem


Ethernet IP from OpenFive supports 400G/200G/100G and 50G rates supporting both packet and ODU interfaces. The complete subsystem also includes a PCS layer and Multi-Channel-Multi-Rate (MCMR) FEC engine, which allows the customer to pick the configuration for their specific application. The FEC engine supports both KR4 RS(528, 514) and KP4 RS(544, 514). Read more HERE.

USB IP Subsystem

OpenFive provides a complete portfolio of USB-certified controllers with host and device functionality. They are integrated with our PHY partners in multiple foundries and nodes. FPGA boards are available for demo and prototype use. Read more HERE.

Interlaken IP subsystem

Extending on the 8th generation of its Interlaken IP core, OpenFive now introduces low latency version of the Chip-to-Chip and Die-to-Die connectivity Interlaken IP used across many applications. Cutting edge technologies such as High Performance Computing (HPC) clusters, AI/ML chip clusters, IoT edge devices, networking, and switching fabrics are demanding high throughput data transfer from one chip to another at very low latency. Interlaken-LL includes a validation platform supporting up to 256Gbps. Read more HERE.

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EdgeLab.ai has developed EdgeLab, a Mixed Reality immersive platform for automotive development, which mixes seamlessly physical equipment and simulation, where HW, Virtual Environment and a full Wireless Network are integrated.

When developing your car or automotive equipment on EdgeLab, you will experiment your product - ahead of production - in a metropolitan environment where cars, infrastructure, people and nature conditions naturally interact in a mixed reality environment, allowing automotive designers to shrink their development time and to improve safety and reliability while reducing the product evaluation and acceptance cycles from their customers.

The EdgeLab.ai Platform is based on the following three fundamental building blocks:

1. EdgeLab Automotive - Driving Connectivity

The fusion of intelligent vehicles, data enhanced roads, and ubiquitous communication infrastructure is making the vision of a driverless future a reality.  The automakers and OEMs must take steps to mitigate design risks, shorten development lifecycle, and deliver products that meet or exceed industry safety standards.  EdgeLab Automotive is a cloud-native platform that enables the automotive designer to evaluate, develop, and test automotive compute solutions with high level of fidelity and realism.

2. EdgeLab Cloud - Connected Infrastructure

With EdgeLab Cloud, automakers and operators can choose from commercial or OSS orchestrators, and private or public clouds hosting options, or select from blueprints to configure a managed core infrastructure to host virtualized and containerized edge Virtual Network Functions (VNFs). Deploy applications from our diverse portfolio of real-world or synthetic VNFs to test, validate, and characterize infrastructure ingredients to explore the best options for your designs and use-cases.

3. EdgeLab Wireless - 5G NR Radio

The edge is an aggregated network of devices and platforms distributed over an infrastructure built on cloud, AIoT, AI/ML and 5G components.  To enable development and validation of Level-4 and Level-5 autonomous vehicles, automakers and OEMs need the tools and hardware & software environment to construct a realistic radio access network that powers vehicle-to-everything (C-V2X) connectivity into which their products deploy. EdgeLab Wireless cloud-native services offer off-the-shelf Layer-1/2 software stack, blueprints, and test & verification methodologies for the automotive and wireless infrastructure designers to build and dimension the right radio access network environment for their development needs.

To read more about EdgeLab.ai on its web page, click here: https://edgelab.ai

To request EdgeLab.ai's White Paper about EdgeLab, the Mixed Reality immersive platform for automotive development, click here: https://edgelab.ai/whitepaper/


SiFive brings the power of the open source RISC-V ISA that it invented combined with innovations in CPU IP to the semiconductor industry, making it possible to develop domain-specific silicon faster than ever before. Together with OpenFive, the industry leaders in domain-specific silicon, SiFive is accelerating the pace of innovation for businesses large and small. SiFive believes a strong community is one of the major benefits of the free and open RISC‑V ISA. SiFive’s customers benefit from the governance of RISC-V International, whose members contribute to and maintain the RISC‑V ISA, extensions, tools, and ecosystem.

The SiFive Core IP portfolio spans from high-performance multi-core heterogeneous application processors to area-optimized, low-power embedded microcontrollers. SiFive Core IP standard core microarchitectures are based on the RISC-V ISA to provide 64-bit and 32-bit options. SiFive Core IP can be tuned to your workload using SiFive Core Designer, leveraging the flexible generator style SiFive uses to design processor architectures for different classes of performance and efficiency. SiFive Standard cores based on our flexible microarchitecture designs are pre-configured for common use cases and are the perfect starting point for designing your own core in SiFive Core Designer. Get started with a free Standard Core evaluation, or build your own custom core design, and receive Verilog RTL and FPGA bitstream.  

Here are a few of SiFive's Flagship CPU IP Cores:

1. U84

The U8 Series features SiFive’s maximum performance RISC-V Linux-capable application processor. The U8 core has a 3 issue out-of-order superscalar with support for virtual memory. The U8 Series provides unprecedented scalability and is optimized for the highest performance per watt. This makes it ideal for applications such as edge compute, 5G base stations and AR/VR/MR.


The SiFive U84 Standard Core is a single-core instantiation of our most scalable out-of-order RISC-V application processor, and is capable of supporting full-featured operating systems such as Linux. The U84 is feature rich and architected for high performance/area or watt, making it ideal for various target markets (e.g., edge/autonomous, enterprise/networking and consumer markets). 

For more information, click here: https://www.sifive.com/cores/u84

2. VIU75-MC

The VIU7 Series features SiFive’s maximum performance RISC-V Linux-capable application processor. The VIU7 core has a 3 issue out-of-order superscalar with support for virtual memory. The VIU7 Series provides unprecedented scalability and is optimized for the highest performance per watt. This makes it ideal for applications such as edge compute, 5G base stations and AR/VR/MR.

The SiFIve Intelligence VIU75-MC Standard Core is a high performance, multi-core RISC-V application processor with vector extensions, capable of supporting full-featured operating systems such as Linux. The VIU75-MC has 4x 64-bit VIU75 cores and 1x 64-bit S7 core. providing high performance with hard real-time determinism. This VIU75-MC is ideal for applications requiring high-throughput performance with real-time guarantees (e.g., Vision and Machine Learning, Natural Language Processing, SLAM Processors, Sensor Fusion).

For more information, click here: https://www.sifive.com/cores/viu75-mc

3. U74-MC

The U7 Series features SiFive’s high-performance RISC-V Linux-capable application processor. The U7 core has a superscalar 8-stage pipeline with support for virtual memory, enabling the most demanding 64-bit RISC-V applications such as Edge Compute, Big-Data Analytics and 5G Base Stations.

The SiFIve U74-MC Standard Core is a high performance RISC-V application processor, capable of supporting full-featured operating systems such as Linux. The U74-MC has 4x 64-bit U74 cores and 1x 64-bit S7 core -- providing high performance with hard real-time determinism. This U74-MC is ideal for applications requiring high-throughput performance with real-time guarantees (e.g., Enterprise Storage, Wireless/Wireline Networking, 5G Baseband Processors, SLAM Processors, Sensor Fusion, etc.)

For more information, click here: https://www.sifive.com/cores/u74-mc

4. But there is much more!

For an overview of all SiFive CPU core Families, click here: https://www.sifive.com/risc-v-core-ip#standard-core-grid

For SW, click here: https://www.sifive.com/software

For Boards, click here: https://www.sifive.com/boards

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Articles and PRs - 2021
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